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Trouble with NVIDIA split

2 posts from 2 people2d activeFading, +0 this weekunverified

Posts per day

Posts per day2 posts, Oct 26 to Nov 9

The posts behind it

GitHub issuesapache/iceberg · gerashegalovOct 30

Spark: Expose the effective split target size as a driver metric

### Feature Request / Improvement Iceberg's Spark scan resolves the split target from the read option, session configuration, table property, or default, then may reduce it through adaptive sizing. The resulting target is passed to task-group planning, but [the adjustment is...

GitHub issuespytorch/pytorch · thearshkumarOct 26

CUDA reductions over an expanded tensor with a reduced dim > INT_MAX: INTERNAL ASSERT in TensorIteratorBase::split

### 🐛 Describe the bug A CUDA reduction over an expanded (stride-0) input whose reduced dimension is larger than `INT_MAX` crashes with an internal assert. It allocates almost nothing. Reproduced on an H100 80GB with 2.14.1+cu130 and nightly 2.16.0.dev20261025+cu130. The same...

Companies and products named

2 posts
1 post
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About this problem

Evidence

2 posts from 2 people in 2 places, about 2 a week over 5 days. Mostly on pytorch/pytorch, apache/iceberg. Tools named alongside: PyTorch, Apache Spark, GitHub, Apache Iceberg.

Frustration Frustration 0 of 3· Seen on GitHub issues

How it was grouped

Posts about NVIDIA with no known issue, sharing the word "split". First post Oct 26, 2026, latest Oct 30, 2026. Unverified: fewer than 3 posts, or one person or place only. Method

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History

First seen with 2 posts; the top post now: "Spark: Expose the effective split target size as a driver metric".

Nov 8, 2026